{"id":81,"date":"2013-10-15T13:25:47","date_gmt":"2013-10-15T10:25:47","guid":{"rendered":"http:\/\/www.scozturk.com\/?p=81"},"modified":"2025-08-27T10:17:09","modified_gmt":"2025-08-27T10:17:09","slug":"s3e-starter-kit-ile-karasimsek-efekti","status":"publish","type":"post","link":"http:\/\/18.193.70.38\/?p=81&lang=tr","title":{"rendered":"S3E Starter Kit ile kara\u015fim\u015fek efekti"},"content":{"rendered":"

8086 ve PIC\u2019den sonra bu uygulamada S3E SK <\/em>y\u0131 kullanarak bir kara\u015fim\u015fek efekti uygulamas\u0131 yapaca\u011f\u0131z. San\u0131r\u0131m kara\u015fim\u015fek efekti yapma olay\u0131 tak\u0131nt\u0131 haline geldi.<\/p>\n

\"\"<\/p>\n

B- Uygulama:<\/strong><\/em><\/p>\n

Teknik olarak bundan \u00f6nceki fpga uygulamalar\u0131na yeni bir \u015fey katmad\u0131\u011f\u0131ndan burada fazla a\u00e7\u0131klama yapmayaca\u011f\u0131m. Daha do\u011frusu a\u00e7\u0131klama yapmayaca\u011f\u0131m :D. A\u015fa\u011f\u0131da uygulaman\u0131n vidyosunu, kodlar\u0131 ve proje dosyas\u0131n\u0131 bulabilirsiniz.<\/p>\n

Tavsiyem \u00f6ncelikle vidyoyu izledikten sonra bu uygulamay\u0131 yapmay\u0131 bir denemenizdir. Sorun ya\u015farsan\u0131z kodlara bakabilirsiniz. Hala sorun ya\u015f\u0131yorsan\u0131z proje dosyas\u0131n\u0131 bilgisayar\u0131n\u0131za indirip bir de \u00f6yle deneyin.<\/p>\n

\n

C – Kod (Verilog):<\/em><\/strong><\/p>\n

\n
    \n
  1. `timescale\u00a01ns\u00a0\/\u00a01ps<\/li>\n
  2. module\u00a0ana(SAAT,LED);<\/li>\n
  3. \/\/\u00a0Girdi-\u00c7\u0131kt\u0131\u00a0kap\u0131lar\u0131<\/li>\n
  4. input\u00a0SAAT;<\/li>\n
  5. output\u00a0[7:0]\u00a0LED;<\/li>\n
  6. <\/li>\n
  7. \/\/\u00a0Yazma\u00e7lar<\/li>\n
  8. <\/li>\n
  9. reg\u00a0[24:0]\u00a0saat_sayac;<\/li>\n
  10. reg\u00a0[7:0]\u00a0ledler;<\/li>\n
  11. reg\u00a0yon;<\/li>\n
  12. <\/li>\n
  13. initial\u00a0begin\u00a0\/\/\u00a0\u0130lk\u00a0de\u011ferleri\u00a0yazma\u00e7lara\u00a0ver<\/li>\n
  14. ledler\u00a0<=\u00a08’b00000001;<\/li>\n
  15. <\/li>\n
  16. saat_sayac\u00a0<=\u00a025’b0000000000000000000000000;<\/li>\n
  17. end<\/li>\n
  18. <\/li>\n
  19. always\u00a0@\u00a0(posedge\u00a0SAAT)\u00a0begin<\/li>\n
  20. if(\u00a0saat_sayac\u00a0==\u00a025’b1011111010111100001000000)<\/li>\n
  21. begin<\/li>\n
  22. if(yon\u00a0==\u00a01’b0)\u00a0begin\u00a0\/\/\u00a0Sola\u00a0kayd\u0131r<\/li>\n
  23. <\/li>\n
  24. if(ledler\u00a0==\u00a08’b10000000)\u00a0begin<\/li>\n
  25. <\/li>\n
  26. ledler\u00a0<=\u00a0ledler\u00a0>>\u00a01;<\/li>\n
  27. <\/li>\n
  28. yon\u00a0<=\u00a01’b1;<\/li>\n
  29. <\/li>\n
  30. saat_sayac\u00a0<=\u00a025’b0000000000000000000000000;\u00a0\/\/\u00a0Sayac\u0131\u00a0s\u0131f\u0131rla<\/li>\n
  31. <\/li>\n
  32. end<\/li>\n
  33. else\u00a0begin<\/li>\n
  34. <\/li>\n
  35. ledler\u00a0<=\u00a0ledler\u00a0<<\u00a01;<\/li>\n
  36. <\/li>\n
  37. saat_sayac\u00a0<=\u00a025’b0000000000000000000000000;\u00a0\/\/\u00a0Sayac\u0131\u00a0s\u0131f\u0131rla<\/li>\n
  38. end<\/li>\n
  39. <\/li>\n
  40. end<\/li>\n
  41. else\u00a0begin\u00a0\/\/\u00a0Sa\u011fa\u00a0kayd\u0131r<\/li>\n
  42. if(ledler\u00a0==\u00a08’b00000001)\u00a0begin<\/li>\n
  43. <\/li>\n
  44. ledler\u00a0<=\u00a0ledler\u00a0<<\u00a01;<\/li>\n
  45. <\/li>\n
  46. yon\u00a0<=\u00a01’b0;<\/li>\n
  47. saat_sayac\u00a0<=\u00a025’b0000000000000000000000000;\u00a0\/\/\u00a0Sayac\u0131\u00a0s\u0131f\u0131rla<\/li>\n
  48. end<\/li>\n
  49. else\u00a0begin<\/li>\n
  50. <\/li>\n
  51. ledler\u00a0<=\u00a0ledler\u00a0>>\u00a01;<\/li>\n
  52. <\/li>\n
  53. saat_sayac\u00a0<=\u00a025’b0000000000000000000000000;\u00a0\/\/\u00a0Sayac\u0131\u00a0s\u0131f\u0131rla<\/li>\n
  54. <\/li>\n
  55. end<\/li>\n
  56. end<\/li>\n
  57. end<\/li>\n
  58. else\u00a0begin<\/li>\n
  59. ledler\u00a0<=\u00a0ledler;<\/li>\n
  60. saat_sayac\u00a0<=\u00a0saat_sayac\u00a0+\u00a025’b0000000000000000000000001;\u00a0\/\/\u00a0Sayac\u0131\u00a01\u00a0artt\u0131r<\/li>\n
  61. <\/li>\n
  62. end<\/li>\n
  63. end<\/li>\n
  64. <\/li>\n
  65. assign\u00a0LED\u00a0=\u00a0ledler;<\/li>\n
  66. <\/li>\n
  67. endmodule\u00a0\/\/\u00a0mod\u00fcl\u00fc\u00a0sonland\u0131r<\/li>\n<\/ol>\n<\/div>\n

    D- UCF Dosyas\u0131:<\/strong><\/em><\/p>\n

    \n
      \n
    1. NET\u00a0“SAAT”\u00a0LOC\u00a0=\u00a0“C9”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVCMOS33\u00a0;<\/li>\n
    2. NET\u00a0“SAAT”\u00a0PERIOD\u00a0=\u00a020.0ns\u00a0HIGH\u00a040%;<\/li>\n
    3. <\/li>\n
    4. NET\u00a0“LED<7>”\u00a0LOC\u00a0=\u00a0“F9”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n
    5. <\/li>\n
    6. NET\u00a0“LED<6>”\u00a0LOC\u00a0=\u00a0“E9”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n
    7. NET\u00a0“LED<5>”\u00a0LOC\u00a0=\u00a0“D11”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n
    8. <\/li>\n
    9. NET\u00a0“LED<4>”\u00a0LOC\u00a0=\u00a0“C11”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n
    10. NET\u00a0“LED<3>”\u00a0LOC\u00a0=\u00a0“F11”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n
    11. <\/li>\n
    12. NET\u00a0“LED<2>”\u00a0LOC\u00a0=\u00a0“E11”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n
    13. NET\u00a0“LED<1>”\u00a0LOC\u00a0=\u00a0“E12”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n
    14. <\/li>\n
    15. NET\u00a0“LED<0>”\u00a0LOC\u00a0=\u00a0“F12”\u00a0|\u00a0IOSTANDARD\u00a0=\u00a0LVTTL\u00a0|\u00a0SLEW\u00a0=\u00a0SLOW\u00a0|\u00a0DRIVE\u00a0=\u00a08\u00a0;<\/li>\n<\/ol>\n<\/div>\n

      E- Proje Dosyas\u0131 (Xilinx ISE):<\/strong><\/em><\/p>\n

      \u0130ndirmek i\u00e7in t\u0131klay\u0131n\u0131z. <\/a><\/p>\n

      Elinizdeki FPGA kitine g\u00f6re kodda baz\u0131 de\u011fi\u015fiklikler yapman\u0131z gerekebilir.<\/p>\n

      F- Vidyo:<\/em><\/strong><\/p>\n

      Vidyo 1<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

      8086 ve PIC\u2019den sonra bu uygulamada S3E SK y\u0131 kullanarak bir kara\u015fim\u015fek efekti uygulamas\u0131 yapaca\u011f\u0131z. San\u0131r\u0131m kara\u015fim\u015fek efekti yapma olay\u0131 tak\u0131nt\u0131 haline geldi. B- Uygulama: Teknik olarak bundan…<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[207,209],"tags":[],"class_list":["post-81","post","type-post","status-publish","format-standard","hentry","category-donanim-tr","category-verilog-tr"],"_links":{"self":[{"href":"http:\/\/18.193.70.38\/index.php?rest_route=\/wp\/v2\/posts\/81","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/18.193.70.38\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/18.193.70.38\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/18.193.70.38\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/18.193.70.38\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=81"}],"version-history":[{"count":1,"href":"http:\/\/18.193.70.38\/index.php?rest_route=\/wp\/v2\/posts\/81\/revisions"}],"predecessor-version":[{"id":1144,"href":"http:\/\/18.193.70.38\/index.php?rest_route=\/wp\/v2\/posts\/81\/revisions\/1144"}],"wp:attachment":[{"href":"http:\/\/18.193.70.38\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=81"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/18.193.70.38\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=81"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/18.193.70.38\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=81"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}